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(parent: b997b56) | patch
ARM: relax the atomic release barrier to "dmb ishst" on Swift
authorTim Northover <tnorthover@apple.com>
Wed, 3 Jul 2013 09:20:36 +0000 (09:20 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 3 Jul 2013 09:20:36 +0000 (09:20 +0000)
commita10c01a6c62792be825c562314a646437b21bfec
tree63c3600a8c347945f32732f94407ed65a2734404tree | snapshot
parentb997b56383a99f739d7e2aa14e6945fea477e597commit | diff
ARM: relax the atomic release barrier to "dmb ishst" on Swift

Swift cores implement store barriers that are stronger than the ARM
specification but weaker than general barriers. They are, in fact, just about
enough to provide the ordering needed for atomic operations with release
semantics.

This patch makes use of that quirk.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185527 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp diff | blob | history
test/CodeGen/ARM/atomic-64bit.ll diff | blob | history
test/CodeGen/ARM/atomic-load-store.ll diff | blob | history
test/CodeGen/ARM/swift-atomics.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors