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(parent: 4873c15) | patch
Add the remaining Intel SHA instructions
authorBen Langmuir <ben.langmuir@intel.com>
Sat, 14 Sep 2013 15:03:21 +0000 (15:03 +0000)
committerBen Langmuir <ben.langmuir@intel.com>
Sat, 14 Sep 2013 15:03:21 +0000 (15:03 +0000)
commita247e9d42b03851be8425631e2716d4ff9f37c47
tree0bad02332ca1bde322c4d9949d0a18feea6a8e3atree | snapshot
parent4873c157f3b6776968f63f66bc76f839bdaf128ecommit | diff
Add the remaining Intel SHA instructions

Also assembly/disassembly tests, and for sha256rnds2, aliases with an explicit
xmm0 dependency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190754 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrSSE.td diff | blob | history
test/MC/Disassembler/X86/x86-64.txt diff | blob | history
test/MC/X86/x86_64-encoding.s diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors