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(parent: df50d7e) | patch
Start TargetRegisterClass indices at 0 instead of 1, so that
authorDan Gohman <gohman@apple.com>
Fri, 18 Jun 2010 18:13:55 +0000 (18:13 +0000)
committerDan Gohman <gohman@apple.com>
Fri, 18 Jun 2010 18:13:55 +0000 (18:13 +0000)
commita606d955de3b0f777131d74162eb6f11b5f95d75
treeb45dd853d37e5f5df32d4138143e9c562c4ff53btree | snapshot
parentdf50d7e238c4802eb2de04646b8f7ff7327730a0commit | diff
Start TargetRegisterClass indices at 0 instead of 1, so that
MachineRegisterInfo doesn't have to confusingly allocate an extra
entry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106296 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/MachineRegisterInfo.h diff | blob | history
include/llvm/Target/TargetInstrDesc.h diff | blob | history
include/llvm/Target/TargetRegisterInfo.h diff | blob | history
lib/CodeGen/MachineRegisterInfo.cpp diff | blob | history
lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp diff | blob | history
lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h diff | blob | history
lib/Target/TargetInstrInfo.cpp diff | blob | history
utils/TableGen/InstrInfoEmitter.cpp diff | blob | history
utils/TableGen/RegisterInfoEmitter.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors