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[SPARC64]: Implement sun4v TSB miss handlers.
authorDavid S. Miller <davem@sunset.davemloft.net>
Fri, 10 Feb 2006 00:12:22 +0000 (16:12 -0800)
committerDavid S. Miller <davem@sunset.davemloft.net>
Mon, 20 Mar 2006 09:12:05 +0000 (01:12 -0800)
commitaa9143b9719c07fb6f1f6207790c9c5086ae07e7
tree74d56ecc53ed0542f200d6c6257c8f051095111ctree | snapshot
parent12816ab38adddc9d7e9b3315d1739655dedc7c9fcommit | diff
[SPARC64]: Implement sun4v TSB miss handlers.

When we register a TSB with the hypervisor, so that it or hardware can
handle TLB misses and do the TSB walk for us, the hypervisor traps
down to these trap when it incurs a TSB miss.

Processing is simple, we load the missing virtual address and context,
and do a full page table walk.

Signed-off-by: David S. Miller <davem@davemloft.net>
arch/sparc64/kernel/sun4v_tlb_miss.S diff | blob | history
arch/sparc64/kernel/tsb.S diff | blob | history
arch/sparc64/kernel/ttable.S diff | blob | history
include/asm-sparc64/ttable.h diff | blob | history
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