Stop inferring isVariadic from instruction patterns.

Stop inferring isVariadic from instruction patterns.

Instructions are now only marked as variadic if they use variable_ops in
their ins list.

A variadic SDNode is typically used for call nodes that have the call
arguments as operands.

A variadic MachineInstr can actually encode a variable number of
operands, for example ARM's stm/ldm instructions. A call instruction
does not have to be variadic. The call argument registers are added as
implicit operands.

This change remove the MCID::Variadic flags from most call and return
instructions, allowing us to better verify their operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162599 91177308-0d34-0410-b5e6-96231b3b80d8