clk: rk: change clk_core init-rate and the way to get cru&grf base
authordkl <dkl@rock-chips.com>
Tue, 11 Feb 2014 02:16:42 +0000 (10:16 +0800)
committerdkl <dkl@rock-chips.com>
Tue, 11 Feb 2014 03:25:43 +0000 (11:25 +0800)
commitaae53cc811077092f747a557f69d503128625f85
tree876dd470a14e3a6df69faa50ddbe94340750957b
parent9defda9cd258620710e76d6aa0d5f789b88bc47c
clk: rk: change clk_core init-rate and the way to get cru&grf base

1. Change clk_core init-rate to 792 MHZ.
2. Use RK_CRU_VIRT & RK_GRF_VIRT to get cru&grf base.
3. Fix pll_wait_lock() func.
arch/arm/boot/dts/rk3188.dtsi
drivers/clk/rockchip/clk-ops.h
drivers/clk/rockchip/clk-pll.c
drivers/clk/rockchip/clk.c