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[mips] [IAS] Add partial support for the ULW pseudo-instruction.
authorToma Tabacu <toma.tabacu@imgtec.com>
Fri, 26 Jun 2015 13:20:17 +0000 (13:20 +0000)
committerToma Tabacu <toma.tabacu@imgtec.com>
Fri, 26 Jun 2015 13:20:17 +0000 (13:20 +0000)
commitaafe2ca7d5b52f6922b4fd6731f94602ba28f888
treefc34b3e39e3e5acf417d09b5287ae4fe2df9d8abtree | snapshot
parent37c948ae7959552f9c990bbec2b719e3b4931e0ecommit | diff
[mips] [IAS] Add partial support for the ULW pseudo-instruction.

Summary:
This only adds support for ULW of an immediate address with/without a source register.
It does not include support for ULW of the address of a symbol.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240782 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/AsmParser/MipsAsmParser.cpp diff | blob | history
lib/Target/Mips/MipsInstrInfo.td diff | blob | history
test/MC/Mips/mips-expansions-bad.s diff | blob | history
test/MC/Mips/mips-expansions.s diff | blob | history
test/MC/Mips/mips64-expansions.s diff | blob | history
test/MC/Mips/set-nomacro.s diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors