clk: rockchip: add CLK_SET_RATE_PARENT_IN_ORDER
authordkl <dkl@rock-chips.com>
Thu, 24 Apr 2014 01:30:12 +0000 (09:30 +0800)
committerdkl <dkl@rock-chips.com>
Mon, 28 Apr 2014 13:24:24 +0000 (21:24 +0800)
commitad11a1286b9b5ac52cb83b7b4db8c7d27db9f182
tree1e5626a4fced29b594287188202cd486b32830e9
parent7348c1bed5da5654b9eefb79881910905d0a57a5
clk: rockchip: add CLK_SET_RATE_PARENT_IN_ORDER

If the flag CLK_SET_RATE_PARENT_IN_ORDER is set, consider the
order of .set_parent and .set_rate, to prevent a too large
temporary rate on rate change. This will fix the bug of clk_gpu
in rk3288.
arch/arm/boot/dts/rk3288-clocks.dtsi
drivers/clk/clk.c
include/dt-bindings/clock/rockchip.h
include/linux/clk-provider.h