BACKPORT: clk: rockchip: add clock controller for rk3228
authorJeffy Chen <jeffy.chen@rock-chips.com>
Fri, 11 Dec 2015 01:30:50 +0000 (09:30 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 22 Jun 2016 11:17:25 +0000 (19:17 +0800)
commitae493681e1b604b31b8aa10489c9a61c54995ce3
tree93ffd04d55608f2dace50dd99c9d206c9a4e8e35
parent34a0fada48944f3139477deee6323bd6be340b13
BACKPORT: clk: rockchip: add clock controller for rk3228

Add the clock tree definition for the new rk3228 SoC.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.8-clk/next commit 307a2e9ac524bbec707c0e2b47ca50adaecc23f2)

[zx:
previouslly we miss the clock driver for rk3228, it may cause
conflict with struct rockchip_clk_provider on the new CCF,
let's update them directly, therefore, there are include 4
BACKPORT CLs in gerrit:
https://10.10.10.29/#/c/20659/1
https://10.10.10.29/#/c/20661/1
https://10.10.10.29/#/c/20662/1
https://10.10.10.29/#/c/20663/1
]

Change-Id: I8d335e17340291f00f8e1643c8e893f88b06457c
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
drivers/clk/rockchip/Makefile
drivers/clk/rockchip/clk-rk3228.c [new file with mode: 0644]
drivers/clk/rockchip/clk.h