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(parent: bf0ce51) | patch
AMDGPU: Fix hardcoded alignment of spill.
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 6 Nov 2015 17:54:47 +0000 (17:54 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 6 Nov 2015 17:54:47 +0000 (17:54 +0000)
commitaf4bb57907a86d46e9a02dd7c6fea7a4dbc0eacf
tree6c7c8abff1b7b39e7b3f940a9a8f180eaf883a1etree | snapshot
parentbf0ce512c5ecaff0631b0c12ff85b0d3e2b5de12commit | diff
AMDGPU: Fix hardcoded alignment of spill.

Instead of forcing 4 alignment when spilled, set register class
alignments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252322 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIInstrInfo.cpp diff | blob | history
lib/Target/AMDGPU/SIRegisterInfo.td diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors