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(parent: 9f9a6fd) | patch
[X86][Haswell][SchedModel] Fix WriteMULm latency.
authorMichael Kuperstein <michael.m.kuperstein@intel.com>
Thu, 26 Feb 2015 14:30:09 +0000 (14:30 +0000)
committerMichael Kuperstein <michael.m.kuperstein@intel.com>
Thu, 26 Feb 2015 14:30:09 +0000 (14:30 +0000)
commitb2b5ffd4522c44f706867c1bf7e3e972abdc2334
tree7af0b1dd69205e1549d1331c65586a7011b21b70tree | snapshot
parent9f9a6fd453e51c9a9c9a6ee046cd34c5bbdc61e4commit | diff
[X86][Haswell][SchedModel] Fix WriteMULm latency.

The latency for the WriteMULm class was set to 4, which is actually lower than the latency for WriteMULr (5).
A better estimate would be 4 added to WriteMULr, that is, 9.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230634 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86SchedHaswell.td diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors