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drm/i915: Be optimistic about future display engines having 7 WM levels
authorDamien Lespiau <damien.lespiau@intel.com>
Sat, 9 May 2015 01:05:55 +0000 (02:05 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 20 May 2015 09:25:40 +0000 (11:25 +0200)
commitb6e742f652791919ce5c8e05a1d664bcbc5111a6
treeafe956e9c03877c0dc0dc3a5ac4d146a6e4093e0tree | snapshot
parent49d6fa210e9a87bd83697692753604cbcaf103aecommit | diff
drm/i915: Be optimistic about future display engines having 7 WM levels

As we're doing throughout the code, being optimistic that platform n + 1
will mostly reuse the same things as platform n allows us to minimize
the enabling work needed.

This time, it's about the number of WM levels.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c diff | blob | history
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