projects / oota-llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 4fb2f33) | patch
MIR Serialization: Serialize the target index machine operands.
authorAlex Lorenz <arphaman@gmail.com>
Tue, 28 Jul 2015 23:02:45 +0000 (23:02 +0000)
committerAlex Lorenz <arphaman@gmail.com>
Tue, 28 Jul 2015 23:02:45 +0000 (23:02 +0000)
commitba90cee0f19a1e7614c472b4571880c20936f22f
tree256db5b6178231222034b72fafcd6abd333fc663tree | snapshot
parent4fb2f3310a51e463e243286e7049c10082da0e5acommit | diff
MIR Serialization: Serialize the target index machine operands.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243497 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/TargetInstrInfo.h diff | blob | history
lib/CodeGen/MIRParser/MILexer.cpp diff | blob | history
lib/CodeGen/MIRParser/MILexer.h diff | blob | history
lib/CodeGen/MIRParser/MIParser.cpp diff | blob | history
lib/CodeGen/MIRPrinter.cpp diff | blob | history
lib/Target/AMDGPU/AMDGPUInstrInfo.cpp diff | blob | history
lib/Target/AMDGPU/AMDGPUInstrInfo.h diff | blob | history
test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir [new file with mode: 0644] blob
test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir [new file with mode: 0644] blob
test/CodeGen/MIR/AMDGPU/lit.local.cfg [new file with mode: 0644] blob
test/CodeGen/MIR/AMDGPU/target-index-operands.mir [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors