UPSTREAM: arm64: fix "dc cvau" cache operation on errata-affected core
authorAndre Przywara <andre.przywara@arm.com>
Tue, 28 Jun 2016 17:07:28 +0000 (18:07 +0100)
committerAmit Pundir <amit.pundir@linaro.org>
Wed, 12 Oct 2016 12:04:22 +0000 (17:34 +0530)
commitbef1ce21fc8fa72ef9816f863d79962f330fd0ad
tree47569c5aa36fd8bb037834d594bb15838b1857ea
parent395caccf0eae01f40f41ea68b574bda5c64ac72c
UPSTREAM: arm64: fix "dc cvau" cache operation on errata-affected core

The ARM errata 819472, 826319, 827319 and 824069 for affected
Cortex-A53 cores demand to promote "dc cvau" instructions to
"dc civac" as well.
Attribute the usage of the instruction in __flush_cache_user_range
to also be covered by our alternative patching efforts.
For that we introduce an assembly macro which both deals with
alternatives while still tagging the instructions as USER.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Change-Id: If5e7933ba32331b2aa28fc5d9e019649452f0f6c
(cherry picked from commit 290622efc76ece22ef76a30bf117755891ab27f6)
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
arch/arm64/include/asm/alternative.h
arch/arm64/mm/cache.S