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(parent: 23740f4) | patch
[X86] DAGCombine should not introduce FILD in soft-float mode
authorMichael Kuperstein <michael.m.kuperstein@intel.com>
Wed, 4 Nov 2015 11:17:53 +0000 (11:17 +0000)
committerMichael Kuperstein <michael.m.kuperstein@intel.com>
Wed, 4 Nov 2015 11:17:53 +0000 (11:17 +0000)
commitc628c1e0b40b7eca79a4f2d3a9d4befbc171eeb8
tree1a262ea367b75f55c6fb25eaf14e577aab0cb00ftree | snapshot
parent23740f4c43d89e7e9840f3ff0a102825bfff89facommit | diff
[X86] DAGCombine should not introduce FILD in soft-float mode

The x86 "sitofp i64 to double" dag combine, in 32-bit mode, lowers sitofp
directly to X86ISD::FILD (or FILD_FLAG). This should not be done in soft-float mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252042 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
test/CodeGen/X86/soft-sitofp.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors