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(parent: 11db068) | patch
Add Cortex-M0 support. It's a ARMv6m device (no ARM mode) with some 32-bit
authorEvan Cheng <evan.cheng@apple.com>
Wed, 11 Aug 2010 06:30:38 +0000 (06:30 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Wed, 11 Aug 2010 06:30:38 +0000 (06:30 +0000)
commitc7569ed4e43a25aa52cf3b5580f1ee00d7d5db96
tree3e02fdec983410b5e2dd089c16fa8f48b1a44db7tree | snapshot
parent11db068721d44fd5f9b0c2a3a4c90f813d2eae9ccommit | diff
Add Cortex-M0 support. It's a ARMv6m device (no ARM mode) with some 32-bit
instructions: dmb, dsb, isb, msr, and mrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110786 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARM.td diff | blob | history
test/CodeGen/Thumb/barrier.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors