[EarlyCSE] Fix handling of target memory intrinsics for CSE'ing loads.

[EarlyCSE] Fix handling of target memory intrinsics for CSE'ing loads.

Summary:
Some target intrinsics can access multiple elements, using the pointer as a
base address (e.g. AArch64 ld4). When trying to CSE such instructions,
it must be checked the available value comes from a compatible instruction
because the pointer is not enough to discriminate whether the value is
correct.

Reviewers: ssijaric

Subscribers: mcrosier, llvm-commits, aemerson

Differential Revision: http://reviews.llvm.org/D13475

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249523 91177308-0d34-0410-b5e6-96231b3b80d8