ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5
authorBoojin Kim <boojin.kim@samsung.com>
Wed, 27 Jun 2012 00:45:42 +0000 (09:45 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Wed, 27 Jun 2012 00:45:42 +0000 (09:45 +0900)
commitc8dd5110dead436b178bb2d8976290fd5f77a2ee
tree549e13c908561307b6c42afdb84558f888112144
parent65ab16fd385f72baf556fcebe5118d8b6f256ace
ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5

Since SYSRAM set the L2 cache latency on EXYNOS5 SoCs,
no longer need that in the kernel. It helps to reduce
booting time (no need cache disable and cache enable).

Signed-off-by: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-exynos/common.c