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UPSTREAM: clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for spdif_8ch
authorzhangqing <zhangqing@rock-chips.com>
Mon, 25 Jan 2016 16:56:01 +0000 (08:56 -0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Tue, 26 Jan 2016 09:29:28 +0000 (17:29 +0800)
commitc9c8007ff799644219b71f12c6b5b1720a7ef516
tree4270ececf512c76b8a62d2ad06b0dcff3a4c31c3tree | snapshot
parent9c61fe501dbedc2715faaa87b261b315390f72bacommit | diff
UPSTREAM: clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for spdif_8ch

SPDIF_8CH set freq need to select parent and calculate parent freq.
so just mark it as the CLK_SET_RATE_PARENT flag.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit 0bbe62eb92755ff7c16c859e96a3877de56e32c9)

Change-Id: I3deed226430c492dc3b70337ae3e89d201aeb66d
drivers/clk/rockchip/clk-rk3368.c diff | blob | history
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