ARM: try to add extra CS-register whenever stack alignment >= 8.
authorTim Northover <tnorthover@apple.com>
Wed, 5 Nov 2014 00:27:20 +0000 (00:27 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 5 Nov 2014 00:27:20 +0000 (00:27 +0000)
commitcafa378fe005c3f6668c7ab84dbbbaa67b18d0ed
treec07736cb36688cfec55aa5ea1730793a3c0c4309
parent1f771b80c0d80f0de36254d2481d1e7b6ae999a4
ARM: try to add extra CS-register whenever stack alignment >= 8.

We currently try to push an even number of registers to preserve 8-byte
alignment during a function's prologue, but only when the stack alignment is
prcisely 8. Many of the reasons for doing it apply also when that alignment > 8
(the extra store is often free, and can save another stack adjustment, though
less frequently for 16-byte stack alignment).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221321 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMFrameLowering.cpp
test/CodeGen/ARM/varargs-spill-stack-align-nacl.ll