[SystemZ] Support RISBGN instruction on zEC12
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 31 Mar 2015 12:58:17 +0000 (12:58 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 31 Mar 2015 12:58:17 +0000 (12:58 +0000)
commitcb1b3ad4e11de9e20fd376f84cf61a2488beae2d
treee130f7080184290adb5db43ce7cb28e0e354c49f
parentee849734207320ee844a80c065ba2848561694e0
[SystemZ] Support RISBGN instruction on zEC12

So far, we do not yet support any instruction specific to zEC12.
Most of the facilities added with zEC12 are indeed not very useful
to compiler code generation, but there is one exception: the
miscellaneous-extensions facility provides the RISBGN instruction,
which is a variant of RISBG that does not set the condition code.

Add support for this facility, MC support for RISBGN, and CodeGen
support for prefering RISBGN over RISBG on zEC12, unless we can
actually make use of the condition code set by RISBG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233690 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
lib/Target/SystemZ/SystemZInstrInfo.cpp
lib/Target/SystemZ/SystemZInstrInfo.td
lib/Target/SystemZ/SystemZProcessors.td
lib/Target/SystemZ/SystemZSubtarget.cpp
lib/Target/SystemZ/SystemZSubtarget.h
test/CodeGen/SystemZ/risbg-03.ll [new file with mode: 0644]
test/MC/Disassembler/SystemZ/insns.txt
test/MC/SystemZ/insn-bad-z196.s
test/MC/SystemZ/insn-bad-zEC12.s [new file with mode: 0644]
test/MC/SystemZ/insn-good-zEC12.s [new file with mode: 0644]