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(parent: 018b7ee) | patch
Do not isel load folding bt instructions for pentium m, core, core2, and AMD processo...
authorEvan Cheng <evan.cheng@apple.com>
Fri, 2 Jan 2009 05:35:45 +0000 (05:35 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Fri, 2 Jan 2009 05:35:45 +0000 (05:35 +0000)
commitccb6976a69a6e146db049fff8e6338e31c91b6f8
treeb17dc585023e3b05a5f8b7a243aa0c68cc76ce46tree | snapshot
parent018b7ee91a1dc8e1f87ea8c9133b5e44d9e57972commit | diff
Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61557 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86.td diff | blob | history
lib/Target/X86/X86InstrInfo.td diff | blob | history
lib/Target/X86/X86Subtarget.cpp diff | blob | history
lib/Target/X86/X86Subtarget.h diff | blob | history
test/CodeGen/X86/bt.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors