3036: enble dpll slow mode at restart
authorwdc <wdc@rock-chips.com>
Fri, 4 Jul 2014 02:10:43 +0000 (10:10 +0800)
committerwdc <wdc@rock-chips.com>
Fri, 4 Jul 2014 02:10:43 +0000 (10:10 +0800)
commitd2beb3e459be1db600245267c671d263a6c071b2
tree8b6d16c57c5531222bbac45edf56310d266a2946
parented0041b98a96ba7879ef12a4a792883698ac3c90
3036: enble dpll slow mode at restart
arch/arm/mach-rockchip/rk3036.c