powerpc/perf: fix fsl_emb_pmu_start to write correct pmc value
authorTom Huynh <tom.huynh@freescale.com>
Tue, 20 Jan 2015 22:19:50 +0000 (16:19 -0600)
committerScott Wood <scottwood@freescale.com>
Fri, 30 Jan 2015 02:05:56 +0000 (20:05 -0600)
commitd2caa3cebda8b626336e100b80a0ed6f909dccab
tree1f72536b25f7bcaa9e891a85891f9a060bcdaeb1
parent238cac16c03eef00bcb607e09defee79dadca958
powerpc/perf: fix fsl_emb_pmu_start to write correct pmc value

PMCs on PowerPC increases towards 0x80000000 and triggers an overflow
interrupt when the msb is set to collect a sample. Therefore, to setup
for the next sample collection, pmu_start should set the pmc value to
0x80000000 - left instead of left which incorrectly delays the next
overflow interrupt. Same as commit 9a45a9407c69 ("powerpc/perf:
power_pmu_start restores incorrect values, breaking frequency events")
for book3s.

Signed-off-by: Tom Huynh <tom.huynh@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
arch/powerpc/perf/core-fsl-emb.c