RK3188:ddr_clock select GPLL_2_div if ddr_freq big then 250MHz,
authorcym <cym@rock-chips.com>
Mon, 13 May 2013 08:40:25 +0000 (16:40 +0800)
committercym <cym@rock-chips.com>
Mon, 13 May 2013 08:40:25 +0000 (16:40 +0800)
commitd4d25daaff1ca522b2a88b69abc956d5cba0fc30
treed3f87713cef2c74d5f48827dc54217ecfa8fc539
parentd24c73a5fd0bd1eff25503630c6a4b72c8779e89
RK3188:ddr_clock select GPLL_2_div if ddr_freq big then 250MHz,
  only use for DPLL bad and ddr_clock must select GPLL(800MHz-1000MHz).
arch/arm/mach-rk30/ddr.c [changed mode: 0644->0755]