clk: rockchip: fix pll_clk_get_best_set() for rk3188plus type pll
authordkl <dkl@rock-chips.com>
Fri, 12 Dec 2014 02:25:26 +0000 (10:25 +0800)
committerdkl <dkl@rock-chips.com>
Fri, 12 Dec 2014 02:41:50 +0000 (10:41 +0800)
commitd52ba29d14cc617c25f72bfbdf802147caa8eb06
tree921bf76e0c10a8a7236c9e366b2b53362e530ec3
parentd072c6fad2ed131e6a76ae620e67a3060c410c36
clk: rockchip: fix pll_clk_get_best_set() for rk3188plus type pll

When selecting a best setting for rk3188plus type pll, consider a
larger NO first(means larger VCO freq), and a smaller NR later.

Signed-off-by: dkl <dkl@rock-chips.com>
drivers/clk/rockchip/clk-pll.c