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UPSTREAM: clk: rockchip: rk3036: fix uarts clock error
authorXing Zheng <zhengxing@rock-chips.com>
Thu, 7 Jan 2016 12:17:34 +0000 (20:17 +0800)
committerCaesar Wang <wxt@rock-chips.com>
Tue, 31 May 2016 01:51:14 +0000 (09:51 +0800)
commitd59b25b148987965cfa5d9212e50d6c0e8f487e6
tree9e4275e0181efdfe8087ffe6ece9dd6ed7a4376btree | snapshot
parent3897ecc585ad700905b6391c72b6d1180a571a94commit | diff
UPSTREAM: clk: rockchip: rk3036: fix uarts clock error

Due to a copy-paste error the uart1 and uart2 clock div set
incorrect, fix it.

Change-Id: Ia15ba135eec824bb2e0f79e3a40c4bbfab544f11
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit b29de2de5049e064d172862b1feeddeb650c3ee8)
drivers/clk/rockchip/clk-rk3036.c diff | blob | history
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