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(parent: 80e70ee) | patch
R600/SI: 64-bit and larger memory access must be at least 4-byte aligned
authorTom Stellard <thomas.stellard@amd.com>
Mon, 2 Feb 2015 18:02:28 +0000 (18:02 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Mon, 2 Feb 2015 18:02:28 +0000 (18:02 +0000)
commitd73d1062fe13190b630ac437c8c847e6112a3647
tree870a425ff14107c31785822c4d28082dbc6b7d2dtree | snapshot
parent80e70ee18e35a55408448d4b07750fdc4ab5640fcommit | diff
R600/SI: 64-bit and larger memory access must be at least 4-byte aligned

This is true for SI only. CI+ supports unaligned memory accesses,
but this requires driver support, so for now we disallow unaligned
accesses for all GCN targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227822 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/R600/SIISelLowering.cpp diff | blob | history
test/CodeGen/R600/cvt_f32_ubyte.ll diff | blob | history
test/CodeGen/R600/unaligned-load-store.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors