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ARM64: add correct vector registers during asm parsing
authorTim Northover <tnorthover@apple.com>
Thu, 15 May 2014 11:16:19 +0000 (11:16 +0000)
committerTim Northover <tnorthover@apple.com>
Thu, 15 May 2014 11:16:19 +0000 (11:16 +0000)
commitd74434656619d19e3e5c3dec79c6ccdaef567bec
tree489e12196412c21f45ea35c30c571a33d157c1e1tree | snapshot
parent75aa5372bcf4e58c9ae4ef0b9aae86993b39c338commit | diff
ARM64: add correct vector registers during asm parsing

Previously, we ignored the difference between V64 and V128 when parsing
assembly: they both got mapped to registers in the FPR128 class. This is
basically harmless at the moment because they both print and encode the same
way. However, it will affect the printing of aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208866 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM64/ARM64RegisterInfo.td diff | blob | history
lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors