clk: rockchip: rk3399: fix up the dclk_vop1_div parents
authorElaine Zhang <zhangqing@rock-chips.com>
Mon, 26 Sep 2016 08:31:30 +0000 (16:31 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Thu, 29 Sep 2016 02:22:44 +0000 (10:22 +0800)
commitd8cbb1aec81a843d42bf7ffeac396f99d1f9e3a9
treef13918c9fc2731ecc614c5578e6619fb474ff1e3
parent904247b6d7a3a0b19bb5cc20f04a7a7bd025c070
clk: rockchip: rk3399: fix up the dclk_vop1_div parents

if the dclk_vop0_div allow CLK_SET_RATE_PARENT for VPLL,
the dclk_vop1_div parent is not allowed in vpll.

Change-Id: I9973014e8ed2fcf1c351e3f62c00040677391ff7
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
drivers/clk/rockchip/clk-rk3399.c