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(parent: a9a0dde) | patch
For ARM load/store instructions, encode [reg+reg] with no shifter immediate as
authorJim Grosbach <grosbach@apple.com>
Tue, 9 Nov 2010 17:38:15 +0000 (17:38 +0000)
committerJim Grosbach <grosbach@apple.com>
Tue, 9 Nov 2010 17:38:15 +0000 (17:38 +0000)
commitd92354c5742ea72abd3039cda5be37cc757d47d2
treeeb3a5f221517f67daf4f832bfb276cad8173dacbtree | snapshot
parenta9a0dde8720d94f96c4e2888801c04c88cdb05cfcommit | diff
For ARM load/store instructions, encode [reg+reg] with no shifter immediate as
a left shift by zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118587 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMMCCodeEmitter.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors