Add support for code generation of the one register with immediate form of vorr.
authorOwen Anderson <resistor@mac.com>
Wed, 3 Nov 2010 22:44:51 +0000 (22:44 +0000)
committerOwen Anderson <resistor@mac.com>
Wed, 3 Nov 2010 22:44:51 +0000 (22:44 +0000)
commitd966817f3cb87897cbec29c967b974924fe939ba
tree0db1ac722a81ce6eac28b7a5ac3adc6d71796e53
parent35b2de012d9404e3e9e4373e45f41711f752dd3a
Add support for code generation of the one register with immediate form of vorr.
We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118201 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMISelLowering.h
lib/Target/ARM/ARMInstrNEON.td
test/CodeGen/ARM/vbits.ll
test/MC/ARM/neon-bitwise-encoding.s