pause SMP and fix idle clk gate when change ddr frequence
authorhcy <hcy@rock-chips.com>
Wed, 30 Apr 2014 10:07:45 +0000 (18:07 +0800)
committerhcy <hcy@rock-chips.com>
Wed, 30 Apr 2014 10:09:08 +0000 (18:09 +0800)
commitdb27b822563c6f3c43ab604658f82579c9bf8aad
tree71ec366534b13d7d6a70a73aa235134136ea3850
parent8b95851682c6929829bf7099ab5ab428138439e8
pause SMP and fix idle clk gate when change ddr frequence
arch/arm/mach-rockchip/ddr_rk32.c