Fix PR16807
authorMichael Liao <michael.liao@intel.com>
Tue, 15 Oct 2013 17:51:02 +0000 (17:51 +0000)
committerMichael Liao <michael.liao@intel.com>
Tue, 15 Oct 2013 17:51:02 +0000 (17:51 +0000)
commitdc8c044a9a3e00cab52ca204717de7aee9dab1be
tree89ad409fb774f860488c22c9bf0af76e96f9d7ad
parentd45b3c4653dc4b18074b04662b6d0009880214e3
Fix PR16807

- Lower signed division by constant powers-of-2 to target-independent
  DAG operators instead of target-dependent ones to support them better
  on targets where vector types are legal but shift operators on that
  types are illegal. E.g., on AVX, PSRAW is only available on <8 x i16>
  though <16 x i16> is a legal type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192721 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/pr16807.ll [new file with mode: 0644]