R600/SI: Fix fneg for 0.0
authorMichel Danzer <michel.daenzer@amd.com>
Tue, 4 Feb 2014 07:12:38 +0000 (07:12 +0000)
committerMichel Danzer <michel.daenzer@amd.com>
Tue, 4 Feb 2014 07:12:38 +0000 (07:12 +0000)
commitde2e0bc3668ac0e2e64bbef329766fa8119c3204
tree5ff313f176186d14af9205c6e3786d1aac78c1d5
parente2d1c6c19d8f643edffca86e2944f1aba4c9feea
R600/SI: Fix fneg for 0.0

V_ADD_F32 with source modifier does not produce -0.0 for this. Just
manipulate the sign bit directly instead.

Also add a pattern for (fneg (fabs ...)).

Fixes a bunch of bit encoding piglit tests with radeonsi.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200743 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/R600/SIInstructions.td
test/CodeGen/R600/fabs.ll
test/CodeGen/R600/fneg-fabs.ll [new file with mode: 0644]
test/CodeGen/R600/fneg.ll