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(parent: 2490dc6) | patch
Adding support for instructions mfc0, mfc2, mtc0, mtc2
authorJack Carter <jcarter@mips.com>
Sat, 6 Oct 2012 01:17:37 +0000 (01:17 +0000)
committerJack Carter <jcarter@mips.com>
Sat, 6 Oct 2012 01:17:37 +0000 (01:17 +0000)
commitde3322746280b957d552cc5e69e121b38c07406c
tree06eb6222f97628ce447b7e1d23b2c845b7df1776tree | snapshot
parent2490dc650895149423bb59538dc03ca352222702commit | diff
Adding support for instructions mfc0, mfc2, mtc0, mtc2
move from and to coprocessors 0 and 2.

Contributer: Vladimir Medic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165351 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsInstrFormats.td diff | blob | history
lib/Target/Mips/MipsInstrInfo.td diff | blob | history
test/MC/Mips/mips-fpu-instructions.s diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors