sparc32: forced setting of mode of sun4m per-cpu timers
authorTkhai Kirill <tkhai@yandex.ru>
Tue, 10 Jan 2012 13:17:03 +0000 (13:17 +0000)
committerDavid S. Miller <davem@davemloft.net>
Wed, 11 Jan 2012 00:28:24 +0000 (16:28 -0800)
commite51e07e0ac7e3ff847d640f41b7527db04d4a4e7
tree1cd232b43e4b80f5e8881d802949a02a29b4ceda
parent7b3480f8b701170c046e1ed362946f5f0d005e13
sparc32: forced setting of mode of sun4m per-cpu timers

SUN4M per-cpu timers have two modes of work. These are timer mode and
counter mode. Kernel doesn't write anything to the register, which is
connected with mode choice.
So, the mode is chosen by bootloader. This patch forces to use timer
mode from the kernel and to be independent of bootloader.

I had this problem with OpenBIOS. Timers don't tick and kernel fails on
QEMU, when it's compiled with SMP support. The patch fixes problem.

Signed-off-by: Tkhai Kirill <tkhai@yandex.ru>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
arch/sparc/kernel/sun4m_irq.c