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dts: rk3126\rk3126b: modify VIO clocks to slove VIO idle fail problem
authordkl <dkl@rock-chips.com>
Tue, 10 Feb 2015 03:01:25 +0000 (11:01 +0800)
committerdkl <dkl@rock-chips.com>
Tue, 10 Feb 2015 03:21:20 +0000 (11:21 +0800)
commite57670a8e14e14601ff6b399efbff7063791f7e2
treedd4adbcb92ab169b900f46cfadb19e9b8b4a48aatree | snapshot
parentcb6303521db989a9e6b426537503fa7f648bd42ccommit | diff
dts: rk3126\rk3126b: modify VIO clocks to slove VIO idle fail problem

In rk3126, when aclk_vio0\aclk_vio1\hclk_vio were reparented from the
default parent gpll_div2 to gpll in clk_init, the temporary rates
are too high and may lead to failture in VIO idle_request later.
To slove this problem, VIO clocks are modified to auto select parent
and consider the order of reparent and set_div when set_rate.

Signed-off-by: dkl <dkl@rock-chips.com>
arch/arm/boot/dts/rk3126.dtsi diff | blob | history
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