R600/SI: add pass to mark CF live ranges as non-spillable
authorTom Stellard <thomas.stellard@amd.com>
Tue, 12 May 2015 17:13:02 +0000 (17:13 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Tue, 12 May 2015 17:13:02 +0000 (17:13 +0000)
commite83e5d460db99fa9ac907d08154ce681b1b08d5b
treec6623f223162f92988169f0b5c17098c8dac9ab3
parent561c44fc33387bf7568271e9620d95e83ed4ed56
R600/SI: add pass to mark CF live ranges as non-spillable

Spilling can insert instructions almost anywhere, and this can mess
up control flow lowering in a multitude of ways, due to instruction
reordering. Let's sort this out the easy way: never spill registers
involved with control flow, i.e. saved EXEC masks.

Unfortunately, this does not work at all with optimizations disabled,
as the register allocator ignores spill weights. This should be
addressed in a future commit.

The test was reduced from the "stacks" shader of [1]. Some issues
trigger the machine verifier while another one is checked manually.

[1] http://madebyevan.com/webgl-path-tracing/

v2: only insert pass with optimizations enabled, merge test runs.

Patch by: Grigori Goronzy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237152 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/R600/AMDGPU.h
lib/Target/R600/AMDGPUTargetMachine.cpp
lib/Target/R600/CMakeLists.txt
lib/Target/R600/SIFixControlFlowLiveIntervals.cpp [new file with mode: 0644]
test/CodeGen/R600/si-spill-cf.ll [new file with mode: 0644]