This patch implements Mips load/store instructions from/to coprocessor 2. Test cases...
authorVladimir Medic <Vladimir.Medic@imgtec.com>
Mon, 16 Sep 2013 10:29:42 +0000 (10:29 +0000)
committerVladimir Medic <Vladimir.Medic@imgtec.com>
Mon, 16 Sep 2013 10:29:42 +0000 (10:29 +0000)
commite925f7dbbf497412cd0cc3f67b9b96fed0cc3712
treed437b605c6c2a28eebc0587ab88f8342319ef300
parent9bc7603750926c15648dae0d31a5451861a0d11e
This patch implements Mips load/store instructions from/to coprocessor 2. Test cases are added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190780 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
lib/Target/Mips/MipsInstrFPU.td
lib/Target/Mips/MipsRegisterInfo.td
test/MC/Mips/mips-fpu-instructions.s