[AArch64] Fix FMLS scalar-indexed-from-2s-after-neg patterns.
authorAhmed Bougacha <ahmed.bougacha@gmail.com>
Fri, 14 Aug 2015 22:06:05 +0000 (22:06 +0000)
committerAhmed Bougacha <ahmed.bougacha@gmail.com>
Fri, 14 Aug 2015 22:06:05 +0000 (22:06 +0000)
commite9da6d5d72d379921754b1e50c99faa164c8c684
treedf866a65c497947d5b27e98313ffb5e68ef388c2
parentfa995560c20aa25436340d7bd3bce2a818dd9314
[AArch64] Fix FMLS scalar-indexed-from-2s-after-neg patterns.

We canonicalize V64 vectors to V128 through insert_subvector: the other
FMLA/FMLS/FMUL/FMULX patterns match that already, but this one doesn't,
so we'd fail to match fmls and generate fneg+fmla instead.
The vector equivalents are already tested and functional.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245107 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64InstrInfo.td
test/CodeGen/AArch64/arm64-neon-2velem.ll