[ARM] tegra: stingray: remove clock and powergate hacks
authorAntti Hatala <ahatala@nvidia.com>
Thu, 26 Aug 2010 11:16:58 +0000 (04:16 -0700)
committerColin Cross <ccross@android.com>
Wed, 6 Oct 2010 23:51:13 +0000 (16:51 -0700)
commitedd4c87e4dbfdc88c304de54e6c44114dc80b2ea
treecbe67feab9045334e02471aa63259f03c2e95f5e
parentcf853d9c88f854fdb7bf8605ade14392992c63fe
[ARM] tegra: stingray: remove clock and powergate hacks

Remove unpowergating of 3d on board init to let the host1x driver
handle it.

Remove enabling hw module clocks on board init for modules behind
host1x.

Keep pll_m clock force-enabled for now as the pll clk disable code
path is not fully functional.

Change-Id: I4721d117b736a591b3cf3ee9f8967b88212f88b8
Signed-off-by: Erik Gilling <konkers@android.com>
arch/arm/mach-tegra/board-stingray.c