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(parent: 62f38ca) | patch
Hexagon: Add encoding bits to the TFR64 instructions.
authorJyotsna Verma <jverma@codeaurora.org>
Tue, 5 Mar 2013 18:42:28 +0000 (18:42 +0000)
committerJyotsna Verma <jverma@codeaurora.org>
Tue, 5 Mar 2013 18:42:28 +0000 (18:42 +0000)
commitee0ef13eba037055d8dc315fc924d967c8f8ce0a
tree886e7aa9b4bc9ddf16917fda1fa75d1b9c5b3b42tree | snapshot
parent62f38ca141f87ff3ed9334fbe6a5e1c45d40ca86commit | diff
Hexagon: Add encoding bits to the TFR64 instructions.
Set imMoveImm, isAsCheapAsAMove flags for TFRI instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176499 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Hexagon/HexagonInstrInfo.td diff | blob | history
test/CodeGen/Hexagon/args.ll diff | blob | history
test/CodeGen/Hexagon/dualstore.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors