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(parent: 2f75c72) | patch
When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8...
authorEvan Cheng <evan.cheng@apple.com>
Thu, 30 Jul 2009 23:29:25 +0000 (23:29 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Thu, 30 Jul 2009 23:29:25 +0000 (23:29 +0000)
commitee42fd309ee6a8febfafb97c2f3b6f2069758c5e
treec53e044fb636d1ed2c18a4671c9ea7e42c3790fctree | snapshot
parent2f75c727f2bc4d76036d12a65c5e21a37e097b90commit | diff
When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77642 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMBaseRegisterInfo.cpp diff | blob | history
lib/Target/ARM/ARMBaseRegisterInfo.h diff | blob | history
test/CodeGen/Thumb2/2009-07-30-PEICrash.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors