Fix PR15267
authorMichael Liao <michael.liao@intel.com>
Wed, 20 Feb 2013 18:04:21 +0000 (18:04 +0000)
committerMichael Liao <michael.liao@intel.com>
Wed, 20 Feb 2013 18:04:21 +0000 (18:04 +0000)
commiteedff3547de6428798d0bd62c40fba3f93820922
tree513bec46e6f002fa6960b2063b2ff2c090e089dc
parent9b5b8b0b9439da2dd4167ece15db7e13d37f461c
Fix PR15267

- When extloading from a vector with non-byte-addressable element, e.g.
  <4 x i1>, the current logic breaks. Extend the current logic to
  fix the case where the element type is not byte-addressable by loading
  all bytes, bit-extracting/packing each element.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175642 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
test/CodeGen/X86/pr15267.ll [new file with mode: 0644]