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(parent: d811b4b) | patch
Add support for the Sparc implementation-defined "ASR" registers.
authorJames Y Knight <jyknight@google.com>
Mon, 18 May 2015 16:29:48 +0000 (16:29 +0000)
committerJames Y Knight <jyknight@google.com>
Mon, 18 May 2015 16:29:48 +0000 (16:29 +0000)
commitf272788a95f234054e2420c8c22ceec93298c6eb
tree3539894936f4964753667491005dd7e6a091be59tree | snapshot
parentd811b4bacb44065e4a5b7b477e35ec7e5a02acbdcommit | diff
Add support for the Sparc implementation-defined "ASR" registers.

(Note that register "Y" is essentially just ASR0).

Also added some test cases for divide and multiply, which had none before.

Differential Revision: http://reviews.llvm.org/D8670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237580 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Sparc/AsmParser/SparcAsmParser.cpp diff | blob | history
lib/Target/Sparc/Disassembler/SparcDisassembler.cpp diff | blob | history
lib/Target/Sparc/SparcISelDAGToDAG.cpp diff | blob | history
lib/Target/Sparc/SparcInstrInfo.td diff | blob | history
lib/Target/Sparc/SparcRegisterInfo.td diff | blob | history
test/CodeGen/SPARC/basictest.ll diff | blob | history
test/MC/Disassembler/Sparc/sparc.txt diff | blob | history
test/MC/Sparc/sparc-special-registers.s [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors