UPSTREAM: pinctrl: rockchip: Add iomux-route switching support
authorDavid Wu <david.wu@rock-chips.com>
Fri, 26 May 2017 07:20:20 +0000 (15:20 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Thu, 1 Jun 2017 06:26:55 +0000 (14:26 +0800)
commitf4d4cff9b469e634c286f295301d66c68dcca190
treed19ae60f2d740591486106df9887ad2af8a3a155
parenta8b4e18cf1e98ed3b36175cb4e3ef422c03ac01c
UPSTREAM: pinctrl: rockchip: Add iomux-route switching support

On the some rockchip SOCS, some things like rk3399 specific uart2 can use
multiple pins. Somewhere between the pin io-cells and the uart it seems
to have some sort of switch to decide to which pin to actually route the
data.

+-------+    +--------+  /- GPIO4_B0 (pinmux 2)

| uart2 | -- | switch | --- GPIO4_C0 (pinmux 2)

+-------+    +--------+  \- GPIO4_C3 (pinmux 2)
(switch selects one of the 3 pins base on the GRF_SOC_CON7[BIT0, BIT1])

The routing switch is determined by one pin of a specific group to be set
to its special pinmux function. If the pinmux setting is wrong for that
pin the ip block won't work correctly anyway.

Change-Id: I4de8dbe8a9183dd866b7dd8289f00c6e14f83dac
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
(cherry picked from git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git for-next
 commit bd35b9bf8284338db35b3ff0d391b95d67b90444)

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I4de8dbe8a9183dd866b7dd8289f00c6e14f83dac
drivers/pinctrl/pinctrl-rockchip.c