drm/i915: Fix FBC_FENCE_OFF
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 23 Jan 2014 14:49:17 +0000 (16:49 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Sat, 25 Jan 2014 20:17:31 +0000 (21:17 +0100)
commitf64f17265977efb54e330aae1e72637d75308244
treecf6c06da6f710af0839657821f4e0eecab0816f7
parent5cd5410e9a68a17d6a9579fd983c878383747c60
drm/i915: Fix FBC_FENCE_OFF

Having a 4 byte register at 0x321b seems unlikely as that's not
4 byte aligned. Since later platforms have more or less the same FBC
registers with new names, assume that FBC_FENCE_OFF is at 0x3218 just
like DPFC_FENCE_YOFF.

This feels like a simple typo in BSpec. 321Bh looks a lot like 3218h
after all.

Should still be tested on real hardware of course. But I don't have
any mobile gen4 systems.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h