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(parent: c5ed457) | patch
clk: rockchip: rk3288: always enable gpll_ddr for ddrc.
authorTang Yun ping <typ@rock-chips.com>
Mon, 8 May 2017 01:36:10 +0000 (09:36 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Mon, 8 May 2017 09:54:43 +0000 (17:54 +0800)
commitf8c67c5e9b491b0218c998f49870b9de8f85e1a2
tree88bb06f55b0f1ed05bcf68405afc87cefdb3163dtree | snapshot
parentc5ed4570f0ac45d3d7f227832903eaa5894cb8b0commit | diff
clk: rockchip: rk3288: always enable gpll_ddr for ddrc.

When ddr frequency scanning, need to switch to gpll for saving
times.

Change-Id: Ibb7e4ed1fa4babaf65e1d98c8a0891766cea63de
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
drivers/clk/rockchip/clk-rk3288.c diff | blob | history
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