For instructions in a delay slot of another instruction,
authorVikram S. Adve <vadve@cs.uiuc.edu>
Tue, 12 Aug 2003 22:22:24 +0000 (22:22 +0000)
committerVikram S. Adve <vadve@cs.uiuc.edu>
Tue, 12 Aug 2003 22:22:24 +0000 (22:22 +0000)
commitfeb3298fca84eaae664281e04b23f1fbe7ade856
tree62bde32f7d99310c83118844703683669d438431
parent88d962aa58db913de0cbb8a9e4446d482994fd93
For instructions in a delay slot of another instruction,
we no longer need to find the live-before set of the delayed
branch since that set is now included the live-before/after
set of the instructions in each delay slot.  Just assert that instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7796 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp